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tpd7211f 2013-11-01 1 toshiba intelligent power device silicon monolithic power mos integrated circuit tpd7211f power mosfet gate driver for half-bridge tpd7211f is a power mosfet gate driver for half-bridge circuit. bicd process is applied on this product. features z power mosfet gate driver for half-bridge z high-side can operate p channel mosfet, low-side can operate n channel mosfet z housed in the ps-8 package and supplied in embossed carrier tape. pin assignment (top view) marking this product has a mos structure and is sensitive electrostatic discharge. son8-p-0303-0.65 weight: 0.017g (typ.) lot no. 7211f part no. (or abbreviation code) ? on the lower left of the marking indicates pin 1 *weekly code: (three digits) week of manufacture (01 for first week of year, continuing up to 52 or 53) year of manufacture (the last digit of the calendar year) in1 1 stby 2 in2 3 gnd 4 8 out1 7 v dd 6 n.c 5 out2 top view start of commercial production 2011-04 please contact your toshiba sales representative for details as to environmental matters such as the rohs compatibility of product. the rohs is the directive 2011/65/eu of the european parliament and of the council of 8 june 2011 on the restriction of the use of certain
tpd7211f 2013-11-01 2 block diagram / application circuit v dd out1 out2 gnd level shift level shift regulator logic stby in1 in2 v batt 50k ? 50k ? motor 150k ? 150k ? 100k ? 100k ? 100k ? 250k ? p channel power mosfet n channel power mosfet
tpd7211f 2013-11-01 3 pin description pin no. symbol pin description 1 in1 input pin for high-side output (out1) control. the in1 pin has an internal pull-down resistor. thus, even if the input is open-circuit, the out1 never turns on (?l?) inadvertently. 2 stby standby pin:by driving this pin ?l?, supply current is 10 a or less and all outputs can be turned off regardless of input signals. by driving this pin ?h?, all outputs are switching normally. the stby pin has an internal pull-down resistor. w hen input is open circuit, this ic becomes the same operation as ?l?. 3 in2 input pin for low-side output (out2) control. th e in2 pin has an internal pull-down resistor. thus, even if the input is open-circuit, the out2 never turns on (?h?) inadvertently. 4 gnd ground pin. 5 out2 drives the low-side n channel power mosfet. 6 n.c no-connect pin. 7 v dd power supply pin. 8 out1 drives the high-side p channel power mosfet.
tpd7211f 2013-11-01 4 absolute maximum ratings (ta = 25c) characteristics symbol pin rating unit remarks power supply voltage v dd v dd ? 0.3 to 35 v when v dd range is 30v or more, pulse width 0.3s v in in1? in2 ? 0.3 to 6 v - input voltage v stby stby ? 0.3 to 35 v when v dd range is 30v or more, pulse width 0.3s output voltage v out out1, out2 ? 0.3 to v dd +0.3 v absolute maximum ratings is 35v or less. when v dd range is 30v or more, pulse width 0.3s output current i out out1, out2 500 ma - p d(1) - 0.7 w refer to note 2a power dissipation(note 2) p d(2) - 0.35 w refer to note 2b operating temperature t opr - ? 40 to 125 c - junction temperature t j - 150 c - storage temperature t stg - ? 40 to 150 c - note1: using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc. ) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operatin g temperature/current/voltage, etc. ) are within the absolute maximum ratings and the operating ranges. please design the appropriate reliability upon reviewing the toshiba semiconductor reliability handbook (?handling precautions?/?derating concept and methods?) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). thermal resistance characteristic symbol rating unit 178.6 (note 2a) junction to ambient thermal resistance r th (j ? a) 357.2 (note 2b) c / w note 2: (a)mounted on glass epoxy board (b) mounted on glass epoxy board glass epoxy board material : fr-4 25.4mm25.4mm0.8mm glass epoxy board material : fr-4 25.4mm25.4mm0.8mm
tpd7211f 2013-11-01 5 electrical characteristics (unless otherwise specified, t j = ? 40 to 125 c, v dd = 5 to 18 v, v stby = 5 v) characteristics symbol pin condition min typ. max unit operating supply voltage v dd(opr) v dd - 5 12 18 v i dd1 v dd v stby =0v, v dd =12v, output pin is open. - - 10 a supply current i dd2 v dd v stby =5v, v dd =12v, v in1,2 =0v, output pin is open. - - 3 ma v ih1 in1,in2 3.5 - - v high level input voltage v ih2 stby 3.5 - - v v il1 in1,in2 - - 1.5 v low level input voltage v il2 stby - - - 0.8 v i ih1 in1,in2 v in1,2 =5v, per one input. - 20 50 a high level input current i ih2 stby v stby =5v - 15 50 a i il1 in1,in2 v in1,2 =0v, per one input. -0.2 - +0.2 a low level input current i il2 stby v stby =0v -0.2 - +0.2 a high-side(out1) high-level output voltage v o1h out1 v in1 =0v, i o =-10ma v dd -0.2 - - v high-side(out1) low-level output voltage v o1l out1 v in1 =5v, i o =+10ma - - 0.2 v low-side(out2) high-level output voltage v o2h out2 v in2 =5v, i o =-10ma v dd -0.2 - - v low-side(out2) low-level output voltage v o2l out2 v in2 =0v, i o =+10ma - - 0.2 v r ds(on)[source] out1, out2 t j =25 , i o =-250ma - 4 8 output on resistance r ds(on)[sink] out1, out2 t j =25 , i o =+250ma - 3 6 ? t d(on)1 - 0.25 1 t on1 - 0.5 2 t d(off)1 - 0.25 1 t off1 out1 - 0.5 2 t d(on)2 - 0.25 1 t on2 - 0.5 2 t d(off)2 - 0.25 1 switching times t off2 out2 v dd =12v, r o =25 ? , c o =5000pf - 0.5 2 s t dead1 out1, out2 t d(off)1 -t d(on)2 , t d(off)2 -t d(on)1 - - 1 dead times t dead2 out1, out2 t d(off)1 -t d(on)1 , t d(off)2 -t d(on)2 - - 1 s *please set the deadtime of the input signal after consi dering the switching time of external power mosfet. *the condition of the typical value is t j =25c, v dd =12v.
tpd7211f 2013-11-01 6 switching times test circuit timing chart truth table stby signal in1 signal in2 signal v out1 v out2 remarks l l l h l l h l h l l l h h l l h h h l standby mode (output is all off) h l l h l out1 and out2 are off mode. (external mosfets are all off mode) h h l l l out1 is on mode. (external high side mosfet is on mode) h l h h h out2 is on mode. (external low side mosfet is on mode) h h h h l high-side/low-side arm shorting mode. in1 stby in2 gnd out1 v dd n.c out2 v v 25? 5000pf 25? 5000pf 12v p.g p.g 5v t d(on) t d(off) t on t off v in1 (v in2 ) v out2 90% 10% 90% 10% t r 0.1 s t f .1 s 12v v out1 v stby v in1 v in2 v out1 v out2 by driving stby low, all output dmos are turned off regardless of input signals. input that is high-side/low-side arm shorting mode(v in1 =v in2 =h) is a prohibition mode. when it is prohibition mode, it is v out1 =h and v out2 =l. (external mosfets are all off)
tpd7211f 2013-11-01 7 0.0 1.0 2.0 3.0 4.0 5.0 -80 -40 0 40 80 120 160 0.0 1.0 2.0 3.0 4.0 5.0 -80 -40 0 40 80 120 160 0 1 2 3 4 5 - 80 -40 0 40 80 120 160 0 1 2 3 4 5 048121620 0 2 4 6 8 10 - 80 -40 0 40 80 120 160 0 2 4 6 8 10 04 8121620 supply current i dd1 [ a] supply voltage v dd [v] i dd1 - v dd supply current i dd2 [ma] supply voltage v dd [v] i dd2 - v dd in1,in2 input threshold voltage v ih1 ,v il1 [v] junction temperature t j [c] v ih1 ,v il1 - t j supply current i dd1 [ a] junction temperature t j [c] i dd1 - t j supply current i dd2 [ma] junction temperature t j [c] i dd2 - t j in1,in2 input threshold voltage v ih2 ,v il2 [v] junction temperature t j [c] v ih2 ,v il2 - t j v stby =0v v in1 =v in2 =0v t j =25c v stby =0v v in1 =v in2 =0v v dd =12v v stby =5v v in1 =v in2 =0v t j =25c v stby =5v v in1 =v in2 =0v v dd =12v v dd =12v v dd =12v v ih1 v il1 v ih2 v il2
tpd7211f 2013-11-01 8 0.00 0.04 0.08 0.12 0.16 0.20 - 80 - 40 0 40 80 120 160 0.00 0.04 0.08 0.12 0.16 0.20 0 4 8 12 16 20 0 10 20 30 40 50 -80 - 40 0 40 80 120 160 0 10 20 30 40 50 01 23 45 0 10 20 30 40 50 - 80 -40 0 40 80 120 160 0 10 20 30 40 50 01 23 45 in1,in2 input current i ih1 [ a] in1 ,in2 input voltage v ih1 [v] i ih1 ? v ih1 stby input current i ih2 [ a] stby input voltage v stby [v] i ih2 ? v stby high-side(out1) high-level output voltage drop v dd -v o1h [v] supply voltage v dd [v] v drop(out1) - v dd in1,in2 input current i ih1 [ a] junction temperature t j [c] i ih1 - t j stby input current i ih2 [ a] junction temperature t j [c] i ih2 - t j high-side(out1) high-level output voltage drop v dd -v o1h [v] junction temperature t j [c] v drop(out1) - t j v in1 =v in2 =5v per one input t j =25c t j =25c v stby =5v v stby =5v v in1 =0v i out1 =-10ma t j =25c v stby =5v v in1 =0v i out1 =-10ma v dd =12v
tpd7211f 2013-11-01 9 0.00 0.04 0.08 0.12 0.16 0.20 - 80 - 40 0 40 80 120 160 0.00 0.04 0.08 0.12 0.16 0.20 0 4 8 12 16 20 0.00 0.04 0.08 0.12 0.16 0.20 - 80 - 40 0 40 80 120 160 0.00 0.04 0.08 0.12 0.16 0.20 0 4 8 12 16 20 0.00 0.04 0.08 0.12 0.16 0.20 - 80 - 40 0 40 80 120 160 0.00 0.04 0.08 0.12 0.16 0.20 0 4 8 12 16 20 high-side(out1) low-level output voltage v o1l [v] supply voltage v dd [v] v o1l - v dd low-side(out2) low-level output voltage drop v dd -v o2h [v] supply voltage v dd [v] v drop(out2) - v dd low-side(out2) low -level output voltage v o2l [v] supply voltage v dd [v] v o2l - v dd high-side(out1) low-level output voltage v o1l [v] junction temperature t j [c] v o1l - t j low-side(out2) high-level output voltage drop v dd -v o2h [v] junction temperature t j [c] v drop(out2) - t j low-side(out2) low -level output voltage v o2l [v] junction temperature t j [c] v o2l - t j v stby =5v v in1 =5v i out1 =+10ma t j =25c v stby =5v v in1 =5v i out1 =+10ma v dd =12v v stby =5v v in2 =5v i out2 =-10ma t j =25c v stby =5v v in2 =5v i out2 =-10ma v dd =12v v stby =5v v in2 =0v i out2 =+10ma t j =25c v stby =5v v in2 =0v i out2 =+10ma v dd =12v
tpd7211f 2013-11-01 10 0 2 4 6 8 10 048121620 0 2 4 6 8 10 048121620 0 2 4 6 8 10 - 80 -40 0 40 80 120 160 0 2 4 6 8 10 0 100 200 300 400 500 0 2 4 6 8 10 - 80 -40 0 40 80 120 160 0 2 4 6 8 10 -500 -400 - 300 - 200 - 100 0 output on resistance r ds(on)[source] [? ] supply voltage v dd [v] r ds(on)[source] - v dd output on resistance r ds(on)[source] [? ] junction temperature t j [c] r ds(on)[source] - t j output on resistance r ds(on)[sink] [? ] output current i out [ma] r ds(on)[sink] - i out output on resistance r ds(on)[source] [? ] output current i out [ma] r ds(on)[source] ? i out output on resistance r ds(on)[sink] [? ] supply voltage v dd [v] r ds(on)[sink] - v dd output on resistance r ds(on)[sink] [? ] junction temperature t j [c] r ds(on)[sink] - t j v stby =5v v in1 =0v/v in2 =5v v dd =12v t j =25c i out =-250ma -500ma v stby =5v v in1 =5v/v in2 =0v v dd =12v t j =25c v stby =5v v in1 =5v/v in2 =0v v dd =12v i out =+250ma +500ma v stby =5v v in1 =0v/v in2 =5v i out =-250ma t j =25c v stby =5v v in1 =0v/v in2 =5v v dd =12v v stby =5v v in1 =5v/v in2 =0v i out =+250ma t j =25c
tpd7211f 2013-11-01 11 0.0 0.2 0.4 0.6 0.8 1.0 - 40 0 40 80 120 160 0.0 0.2 0.4 0.6 0.8 1.0 - 80 -40 0 40 80 120 160 0.0 0.2 0.4 0.6 0.8 1.0 048121620 0.0 0.2 0.4 0.6 0.8 1.0 - 80 -40 0 40 80 120 160 0.0 0.2 0.4 0.6 0.8 1.0 048121620 switching times(out1) [ s] supply voltage v dd [v] switching times (out1) - v dd switching times(out2) [ s] supply voltage v dd [v] switching times (out2) - v dd power dissipation p d [w] ambient temperature t a [c] p d - t a switching times(out1) [ s] junction temperature t j [c] switching times (out1) ? t j switching times(out2) [ s] junction temperature t j [c] switching times (out2) ? t j t off1 v stby =5v v in1 =0v/5v r o =25 ? ,c o =5000pf t j =25c t on1 t d ( off ) 1 t d ( on ) 1 t d ( on ) 1 t d ( off ) 1 t on1 t off1 t off2 t on2 t d ( off ) 2 t d ( on ) 2 t off2 t on2 t d ( off ) 2 t d ( on ) 2 v stby =5v v in1 =0v/5v r o =25 ? ,c o =5000pf v dd =12v v stby =5v v in2 =0v/5v r o =25 ? ,c o =5000pf t j =25c v stby =5v v in2 =0v/5v r o =25 ? ,c o =5000pf v dd =12v (1) (2) (1) mounted on glass epoxy board (a) (note 2a) (2) mounted on glass epoxy board (b) (note 2b)
tpd7211f 2013-11-01 12 package dimensions son8-p-0303-0.65 unit mm weight 0.017g(typ.) 0.330.05 2.40.1 0.80.05 0.330.05 0.475 0.65 0.170.02 2.80.1 s a 0.05 m b 2.90.1 0.28 +0.1 -0.11 0.28 +0.1 -0.11 1.12 +0.13 -0.12 1.12 +0.13 -0.12 b 0.05 m a s 0.025
tpd7211f 2013-11-01 13 restrictions on product use ? toshiba corporation, and its subsidiaries and affiliates (collect ively "toshiba"), reserve the right to make changes to the in formation in this document, and related hardware, software and systems (collectively "product") without notice. ? this document and any information herein may not be reproduc ed without prior written permission from toshiba. even with toshiba's written permission, reproduc tion is permissible only if reproduction is without alteration/omission. ? though toshiba works continually to improve product's quality and reliability, product can malfunction or fail. customers are responsible for complying with safety standards and for prov iding adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid situations in which a ma lfunction or failure of product could cause loss of human life, b odily injury or damage to property, including data loss or corruption. before customers use the product, create designs including the product, or incorporate the product into their own applications, cu stomers must also refer to and comply with (a) the latest versions of all relevant toshiba information, including without limitation, this document, the specifications, the data sheets and application notes for product and the precautions and condi tions set forth in the "toshiba semiconductor reliability handbook" and (b) the instructions for the application with which the product will be us ed with or for. customers are solely responsible for all aspe cts of their own product design or applications, including but not limited to (a) determining the appropriateness of the use of this product in such design or applications; (b) eval uating and determining the applicability of any info rmation contained in this document, or in c harts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operatin g parameters for such designs and applications. toshiba assumes no liability for customers' product design or applications. ? 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